DMD Schematic

The Dot Matrix Display (DMD) is a 32x16 array of high-brightness LEDs for visually striking effects. [Product Page]

DMD Schematic

Postby twizted » Tue Jun 12, 2012 10:19 pm

Any chance you guys will be posting this at some point? I noticed it's said coming soon for some time now on the product page.
twizted
 
Posts: 6
Joined: Mon Jan 30, 2012 6:13 pm

Re: DMD Schematic

Postby VizzTech » Fri Jun 22, 2012 12:07 pm

yes I would also like to see the schematic too please guys?
VizzTech
 
Posts: 5
Joined: Fri Jun 22, 2012 12:02 pm

Re: DMD Schematic

Postby 42n8 » Wed Jan 09, 2013 1:09 pm

twizted wrote:Any chance you guys will be posting this at some point? I noticed it's said coming soon for some time now on the product page.


Makanaki posted a copy of an earlier version of this board a few days ago. Note that it is NOT the version supplied by Freetronics but it still may be useful.

I have converted it to pdf format to make it accessible to everyone.

Inexplicably, pdf files are not an acceptable file type so it is contained within a zipped file, which presents a far greater security risk.

The second issue encountered is the rediculously small 256K file upload size limit. Consequently the file is split and you will need to download both parts in order to extract the PDF version.

Thanks Makanaki we appreciate it.


Regards
Attachments
P10sch.part2.rar
P10(IR) 701-B Schematic Part 2
(210.24 KiB) Downloaded 808 times
P10sch.part1.rar
P10(IR) 701-B Schematic Part 1
(244.14 KiB) Downloaded 816 times
42n8
 
Posts: 46
Joined: Wed Dec 26, 2012 8:10 pm
Location: Auckland, NZ

Re: DMD Schematic

Postby 42n8 » Wed Jan 09, 2013 4:22 pm

The PDF contains some simplified Chinese: The following is a good translation

The entire schematic diagram is not shown, however each signal is routed as described below:
  1. JP1 header pin 16 (signal A) -> 74HC245 pin 2 (input) -> 74HC245 pin 18 (output) -> 74HC138 pin 1 & JP2 header pin 16
  2. JP1 header pin 15 (signal B) -> 74HC245 pin 3 (input) -> 74HC245 pin 17 (output) -> 74HC138 pin 2 & JP2 header pin 15
  3. JP1 header pin 1 (signal OE) -> 74HC245 pin 4 (input) -> 74HC245 pin 16 (output) -> 74HC04D pin 1(input) -> 74HC04D pin 2 (output) ->
    1. 74HC138 pin 5; and
    2. 74HC04D pin 3 (input) -> 74HC04D pin 4 (output) -> JP2 header pin 1
  4. JP1 header pin 11 (signal R) -> 74HC245 pin 9 (input) -> 74HC245 pin 11 (output) -> routes through
    74HC595-1 pin 14 (input) -> 74HC595-1 pin 9 (output) ->
    74HC595-2 pin 14 (input) -> 74HC595-2 pin 9 (output) ->
    74HC595-3 pin 14 (input) -> 74HC595-3 pin 9 (output) ->
    74HC595-4 pin 14 (input) -> 74HC595-4 pin 9 (output) ->
    … (and each subsequent 74HC595 in turn until) ->
    74HC595-16 pin 14 (input) -> 74HC595-16 pin 9 -> JP2 header Pin 11

Regards
Last edited by 42n8 on Mon Jan 28, 2013 12:46 am, edited 1 time in total.
42n8
 
Posts: 46
Joined: Wed Dec 26, 2012 8:10 pm
Location: Auckland, NZ

Re: DMD Schematic

Postby Makanaki » Thu Jan 10, 2013 8:02 am

Thanks Makanaki we appreciate it.


You´re welcome mate, anything to help :) .

I have to work now at low level to figure out how the leds are connected to see what is the sequence of bits to send. Can´t use arduino libraries because I´m using microchip pic (proton picbasic).

Any help would be appreciated ;)
Makanaki
 
Posts: 3
Joined: Mon Jan 07, 2013 1:01 am

Re: DMD Schematic

Postby 42n8 » Thu Jan 10, 2013 8:40 pm

Can´t use arduino libraries because I´m using microchip pic (proton picbasic).

breeti109 published his PIC18F library on Jan 02, 2012, which is available at
http://forum.freetronics.com/viewtopic.php?f=26&t=124&start=10

The setup will be different from that which I published when I verified his library and sample code.
I did not verify all aspects of his library so there may be errors in some functions, but I doubt it.
That said, some functions that I did try produced unexpected results.

The library includes a function that automagically expands the text size by a factor of 2, which is great for static text. However, I have been looking to use this in a scrolling routine but without success to date. Access to the schematic makes understanding the technology at a low level far easier.

I'm not familiar with PICBasic but I imagine that the library would not be too difficult to port, providing that PICBasic contains the support functionality for SPI etc.

Regards
Last edited by 42n8 on Thu Jan 10, 2013 10:05 pm, edited 1 time in total.
42n8
 
Posts: 46
Joined: Wed Dec 26, 2012 8:10 pm
Location: Auckland, NZ

Re: DMD Schematic

Postby 42n8 » Thu Jan 10, 2013 9:15 pm

I'll now provide an overview of the addressing, since that's why most of us are here.

There is a stack of information on the SPI protocol so it isn't necessary to cover it in detail here. Just to recap though, the SPI protocol consists of 8 serial bits per command followed by the 8 bit data byte. For a write instruction, the first 3 bits is the instruction, the next 5 is the address to write to and the next 8 bits is the data. In this case the read instruction can be ignored since there is no SPO connection to the processor.

Data appearing at the inputs of the 74HC245D is buffered, which increases the fan-out of the logic gates while reducing the loading on the processor. Notice that the CLK and SCLK inputs are each sent to two buffer inputs, which also provides a conditioned signal to the next board in the chain.

The OE signal is inverted to /OE since that is required for correct operation of the 3 to 8 line decoder, 74HC138. It is again inverted back to OE, which ensures that the next board will operate correctly.

Signals A and B are fed directly to the next board in the chain where they will be buffered again. They are also fed to the row selector, pins 1 and 2 of the 74HC138. With A3 tied low this device becomes a 2 to 4 line decoder where each output is mutually exclusive. In other words, only one line can be active at a time. Valid inputs are 0x00, 0x01, 0x10 AND 0x11 and each combination will select (power) a pair of LED chains via the attached 4953s (Dual P-Channel MOSFETs). The resulting selection is any one of (OUT1 and OUT3) or (OUT2 and OUT4) or (OUT5 and OUT7) or (OUT6 and OUT8).

Now comes the interesting stuff...

The 74HC595 is an 8 bit shift register allowing the selection of 16 outputs (in this case LEDs).

Pin Description:
  1. Vcc - Up to 6V, Usually 3.3 / 5v
  2. Q0 to Q7 - Shift Register Outputs.
  3. DS - (Serial Input) for the next pin that gets shifted in.
  4. STCP [SRCLK] (Serial Clock) When this pin is pulled high, it will shift the register.
  5. SHCP [RCLK] (Register Clock) Needs to be pulled high to set the output to the new shift register values, This must be pulled high directly after SRCLK has gone LOW again.
  6. /OE (Output Enable) This pin enables the output when tied to GND, & disabled when HIGH.
  7. /MR (Reset) This active low input resets the device.

OE and MR need not be considered from a programming perspective since both pins are preset in hardware.

The 595 is cascadable simply by joining the D7s output on pin 9 of one device to pin 14 of the next. The "R" input is fed pin 14 of 74HC595-1 and its output D7s (Dout in the schematic) is fed to pin 14 of the next stage. Cascading these devices is only limited only by the processing time available and indeed pin 9 of 74HC595-16 is fed to the "R" input of the next board for that purpose.

As is typical of shift registers, the output is active high, as you would expect. However the 595s are sinking current, which means you must supply the inverse of what you actually want and it will operate in the correct sense.

And that's just about all there is to it, hardware wise.

If anyone would like more detail just ask.

Regards
42n8
 
Posts: 46
Joined: Wed Dec 26, 2012 8:10 pm
Location: Auckland, NZ


Return to Dot Matrix Display

Who is online

Users browsing this forum: No registered users and 0 guests